¶ title: Application Case: Understanding IW-RFSOC-2T2R Clock Tree Structure and Implementing Register Configuration
description:
published: true
date: 2025-04-25T16:29:02.863Z
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editor: markdown
dateCreated: 2025-01-15T14:41:59.309Z
¶ Summary
This application case uses the clock tree structure of the IW-RFSOC-2T2R board as an example to introduce how to configure its clock using the LMK04828 Clock PLL Calculation Program.
¶ Understanding Board Clock Tree Structure
According to the IW-RFSOC-2T2R board manual, its clock tree structure is as follows:
¶ Clarifying Clock Path
According to the LMK04828 chip user manual, we can see that the clock tree works best in dual PLL mode. The crystal oscillators and voltage-controlled oscillators provided on the board can provide the working state to form dual PLLs. The internal working diagram should be:
The red lines represent the clock path of the first PLL group, the blue lines represent the clock path of the second PLL group, and the green lines represent the reference clock input to the next level. Configuring the loop as shown in the figure can achieve the best clock working state.
¶ Configure Clock Output
Combining the above content, we can call the LMK04828 Clock PLL Calculation Program for the following configuration:
#include "LMK_ClockTree.h"
LMK_Config LMK_inst;
LMK_Simple LMK_simple;
// Set reference clock rate
LMK_simple.RefClockRate = 30720000;
// Set expected VCO clock rate
LMK_simple.VCOXClockRate = 122880000;
// Set SYSREF
LMK_simple.SYSREFRate = 7680000;
// DClockRate[n] for DCLKout(2n), the SDCLKout(2n+1) are all set to SYSREF
LMK_simple.DClockRate[0] = 491520000;
LMK_simple.DClockRate[1] = 491520000;
LMK_simple.DClockRate[2] = 491520000;
LMK_simple.DClockRate[3] = 0;
LMK_simple.DClockRate[4] = 0;
LMK_simple.DClockRate[5] = 0;
LMK_simple.DClockRate[6] = 0;
// Config the interface instance for LMK
LMK_simple.InterfaceInst = &SPI_inst;
// Generate config using LMK_simple
LMK_ConfigMake(&LMK_inst, &LMK_simple);
// Download to LMK
LMK_Init(&LMK_inst);